Memory Hierarchy Simulator

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Download test cases containing various trace.config and trace.dat files. Note: Larger traces may take longer to run in this JS simulation.

Configuration

Memory Layout

TLB: - Page table: - D-Cache: - L2: -

Address Breakdown

Translation Lookaside Buffer

Page Table

Data Cache

L2 Cache

Main Memory

Simulation Statistics

What's happening

    Output

    
      

    System Trace Log

    
      

    Created for UTK COSC530 Computer Organization. Guide here for those who are lost.